Nan Zhou, Yingfei Yao, Xiaojun Liang, Shunchun Yao, Chunhua Yang, Weihua Gui
Deploying EtherCAT in container-based virtualized programmable logic controllers (vPLCs) faces critical challenges regarding driver portability, network determinism, and synchronization scalability. This article proposes a container-native architecture named vECAT by leveraging the data plane development kit (DPDK) for high-performance user-space packet processing, which eliminates kernel dependencies and ensures cross-platform portability. We develop a latency model that characterizes the end-to-end packet processing pipeline and guides systematic optimizations at the task, OS, and hardware levels. We also introduce an enhanced synchronization algorithm to address error accumulation in large-scale networks. Validated on x86, ARM, and RISC-V platforms running PREEMPT_RT Linux, the proposed solution achieves maximum jitters of 11, 12, 24µs at a 125µs cycle time on three typical types of vPLCs CPUs under various kinds of stress loads. Furthermore, the optimized synchronization mechanism eliminates the linear accumulation of synchronization error, achieving bounded precision validated on networks with up to 8 subdevices.