Design and simulation of a CNTFET based approximate full adder for low power nanoelectronic and image processing applications.

The unique electrical properties of carbon nanotube (CNT) materials have enabled the development of highly efficient nanoelectronic devices. Leveraging these advantages, this work presents a CNT-material-driven design of a CNTFET-based approximate full adder (AFA) optimized for low-power arithmetic operations. The proposed architecture integrates CMOS and pass-transistor logic with multi-threshold CNTFET devices to minimize voltage degradation and enhance energy efficiency. Circuit-level simulations were performed using Synopsys HSPICE with the Stanford 32-nm CNTFET model. Results demonstrate that the proposed AFA achieves a 7.2-66.5% reduction in power consumption and a 2.7-81.1% improvement in energy efficiency compared with existing designs at a 0.5 V supply. To confirm practical applicability, the AFA is incorporated into an image blending system, where it delivered superior visual fidelity based on PSNR and SSIM metrics. Comprehensive figure-of-merit analysis further confirms the correctness of the design for modern low-power nanoelectronic and approximate computing applications.