A Methodology for Designing High-Efficiency Power Amplifiers Using Simple Microstrip Harmonic Tuning Circuits

This paper presents a simple effective methodology for designing high-efficiency power amplifiers (PAs) utilizing a compact microstrip harmonic-tuned load network. The proposed approach employs a combination of a two-section transformer and three shunt-connected stubs, reducing component count relative to conventional harmonic-tuned circuits. The novel load network achieves optimized load impedances at the fundamental, second, and third harmonics while accounting for parasitic effects of packaged transistors. For experimental validation, an inverse Class-F (Class-F−1) PA is designed and fabricated using a Cree GaN HEMT (model CGH40010F) operating at 2.5 GHz. The measured results demonstrate a peak power-added efficiency (PAE) of 79.8% with a saturated output power (Psat) of 40.2 dBm.