He Cheng, Zhijia Yang, Chao Zhang, Zhipeng Zhang
This paper presents an analytical compact DC current model and a numerical gate capacitance model for p-type cylindrical gate-all-around (GAA) nanowire metal-oxide-semiconductor field-effect transistors (MOSFETs). The models are formulated within the Landauer transport framework, incorporating source-to-drain tunneling (SDT) and quantum statistical charge analysis. The proposed current model is validated against non-equilibrium Green's function (NEGF) simulations for different channel lengths, nanowire radii, and bias conditions, showing good agreement with the NEGF results in the ballistic limit. The model parameters are separated into physical parameters obtained or calibrated from the NEGF simulations and a single set of global empirical fitting parameters. The latter is extracted once and remains unchanged across the investigated device geometries and bias conditions, allowing its transferability to be evaluated. The compact model is implemented in Verilog-A, and its SPICE compatibility is verified through DC simulations of PMOS inverter circuits. All NEGF comparisons in this work are performed with a zero channel backscattering coefficient corresponding to the ballistic transport limit; validation of the quasi-ballistic regime is left for future work.