Evan Litch, Hyunjae Lee, Sang Ki Nam, Mark J. Kushner
With the increase in aspect ratio of features in microelectronics fabrication, the trend in plasma etching of high aspect ratio features is toward the use of very low frequencies (VLFs) for substrate biases. With substrate biases of 100s kHz, the maximum ion energy onto the wafer generally increases for a given voltage amplitude. Industry trends are also toward pulsing the substrate bias to control the neutral to ion flux ratios onto the wafer. A consequence of pulsing with VLF is that the DC self-bias on the blocking capacitor, VDC, becomes dynamic. Depending on the RC time constant for charging and discharging VDC relative to the bias-on and bias-off portions of the pulsed cycle, VDC can significantly vary during the pulse period. These dynamics can then affect the ion energy distributions (IEDs) incident onto the wafer. A computational investigation was conducted on IEDs incident onto the wafer in an inductively coupled plasma sustained in Ar/Cl2/O2 mixtures with a pulsed substrate bias of 250 kHz. Trends of VDC, peak-maximum-energy (the most probable ion energy onto the wafer), and IEDs during the bias-on and bias-off portions of the cycle are discussed as a function of pulse repetition frequency, duty cycle, blocking capacitance, and the focus ring (FR) electrical properties. IEDs during the bias-off portion of the pulse period are most sensitive to these dynamics in VDC. Pulsing reduced the angular tilt of the IED at the edge of the wafer, a critical consideration for minimizing edge exclusion, when compared with continuous excitation. Pulsing reduced the charging of the FR, which, in turn, reduced the sheath curvature at the edge of the wafer.