Counteracting the Active Area Reduction Caused by Explicit Guard Rings in High-Voltage CMOS SPADs

Novel structures of circular single-photon avalanche diodes (SPADs) with different active junction radii (9 and$\text{4}~{\mu }$m) have been fabricated in a commercial 180-nm high-voltage (HV) CMOS process. The devices were connected to an active quenching and recharge circuit (AQRC) fabricated in the same technology, capable of operating at excess voltages up to 20 V, and characterized in terms of dark count rate (DCR), afterpulsing probability (AP), and position-dependent photon detection probability (PDP). The device with the larger radius exhibits state-of-the-art noise performance with a DCR per unit area below 0.2 Hz/$ {\mu }$m$^{\text {2}}$at$\textit {V}_{\textbf {EX}}=\text {5}$V, but the device with the smaller radius shows a further improvement in DCR by more than a factor of 10, which clearly does not scale with area. Technology computer-aided design (TCAD) simulations have been performed to explain the differences in breakdown voltage and DCR between the two structures, and the record-low DCR of the smaller device was linked to a significant decrease in effective active area, caused by the electric field decrease due to charge sharing between the explicit guard ring (GR) and the multiplication region, as confirmed by position-dependent PDP measurements over the entire device. Nevertheless, it is demonstrated that the active area can be increased by applying a higher excess voltage while achieving a central PDP above 20% at a wavelength of 635 nm, making the device an attractive candidate for ultralow-noise applications where a high fill factor is not a critical requirement.