Semi-Empirical Modeling of Hot Carrier Degradation in 12-nm FinFET LDMOS Devices

This paper presents a Semi-empirical Reliability Model for Hot-Carrier Degradation (HCD) in FinFET LDMOS devices. Unlike planar LDMOS, FinFET LDMOS exhibits non-saturating HCD over prolonged operation, due to its distinct three-dimensional geometry, which affects electric field distribution and carrier transport mechanisms. Traditional degradation models, such as the time slope exponent and bond dissociation (BD) approaches do not adequately capture this unique degradation due to the 3D structural complexities of FinFET LDMOS. To address this limitation, an enhanced model to account for HCD in FinFET LDMOS is introduced in this paper, significantly improving predictive accuracy for device lifetime. Hot-carrier Degradation for FinFET LDMOS is also characterized with variation in drain to source stress bias and number of fins (NFIN). When all other design parameters remain same, HCD increases with an increase in the drain-to-source stress voltage and reduces with an increase in the number of fins (NFIN).