He Li, Tinus Pannier, Ye Gu, Prasanna Ramaswamy, Ruggero Loi, Patrick Heise, Mesut İnaç, Alex Farrell, Antonio Jose Trindade, Alin Fecioru, Kristof Dhaenens, Toon De Baere, Nishant Singh, Laurens Bogaert, Senbiao Qin, Biwei Pan, Jing Zhang, Geert Van Steenberge, Peter Ossieur, Günther Roelkens
We demonstrate micro-transfer printing ($\mu$TP) and post-printing metallization of thin electronic chiplets on silicon, with a view to heterogeneously integrate electronic integrated circuits (EICs) with photonic integrated circuits (PICs).$\mu$TP decouples the fabrication of EICs and PICs, and simultaneously enables their tight integration with high-throughput, small form-factor and on wafer-scale. In this study, we successfully established the process flow for releasing and printing 300$\mu$m × 200$\mu$m SiGe BiCMOS electronic driver chiplets and electrically connecting these chiplets using a polymer ramp to overcome the 20-$\mu$m chiplet thickness, providing a gain of 14 dB and bandwidth of over 35 GHz with low-parasitic interconnections. The proposed methodology provides a practical and mass-producible solution to realize the stacking of EICs on silicon photonic wafers for emerging applications such as co-packaged optics (CPO).