Energy-efficient implementation of spiking recurrent cells on FPGA

Abstract Spiking neural networks (SNNs) can significantly reduce energy consumption compared to conventional artificial neural networks when spiking activity is sparse and the neuron model is hardware-friendly. However, biologically faithful models are often too costly for hardware implementations like field-programmable gate arrays (FPGAs), whereas highly simplified models, such as the leaky integrate-and-fire (LIF) neuron, sacrifice essential neuronal dynamics. In this work, we present an FPGA accelerator for an SNN utilizing the spiking recurrent cell (SRC) model, which offers an intermediate level of biological plausibility and hardware efficiency between simple LIF and complex conductance-based models. The SRC model features continuous spikes and critical dynamical properties like the refractory period, yet remains mathematically simple enough for efficient FPGA deployment. To optimize SRC computation, we propose a set of mathematical simplifications such as piecewise-defined approximations that eliminate costly non-linear functions ( tanh , exp ) and using scaling to avoid floating-point arithmetic. We then integrate these units into a cohesive hardware architecture using a dedicated binding layer to permit modularity and scalability of the network VHDL architecture. To demonstrate this modularity, two complete networks, with respectively 1 and 4 SRC layers, were implemented and validated using Spiking Traces (SpT) derived from, respectively, the MNIST and Fashion-MNIST datasets. Weight matrices computed offline are stored directly in LUT-registers without retraining or hardware-specific adaptation to strictly evaluate the robustness of SRC. The reference implementation achieves 96.31 % accuracy on MNIST with a 220 -image SpT and a processing time of 1.7424 ms per digit. We further investigate accuracy-energy trade-offs by reducing the SpT length and quantizing synaptic weights down to 4 bits , achieving 93.32 % accuracy at 0.492 mJ per digit ( 55 images , 5 -bit weights) and 92.89 % at 0.394 mJ ( 44 images , 4 -bit weights). These results demonstrate that SRC-based SNNs deliver competitive performance and low energy consumption while preserving richer neuronal dynamics than standard LIF models.