Ram Eknath Munde, Noah Vaillancourt, Heng-Ray Chuang, Chongke Gu, Yifan Wang, Raisul Islam
Emerging technologies such as artificial intelligence (AI), large-scale molecular simulations, and next-generation materials and drug discovery demand unprecedented computational power and high-bandwidth interconnects. Conventional two-dimensional integrated circuits (2D ICs) are nearing their physical and performance limits due to challenges in thermal management, signal integrity, and leakage currents. Three-dimensional integrated circuits (3D ICs) offer a promising pathway to overcome these limitations by vertically stacking multiple device layers, thereby reducing interconnect lengths and enabling a broad range of high-performance applications. This paper presents a comprehensive review of 3D ICs systems, with an emphasis on energy efficiency across various conventional and heterogeneous integration schemes, packaging architectures, and the trade-offs between thermal and electrical performance. We examine the relative merits of different bonding techniques, floorplanning algorithms, cooling solutions, and power delivery network (PDN) designs, highlighting their interdependencies and optimization challenges. The insights presented in this review are intended to help researchers and designers identify and implement strategies that enhance the performance, energy efficiency, and reliability of 3D ICs for high-performance computing applications.