Selective harmonic elimination in T-type multilevel inverter with reduced switch count using Sea-Horse Algorithm

Multi-level inverters (MLIs) are also used in relatively high-power systems; but the goals of low overall harmonic distortion (THD) and fewer power semiconductor devices remain a design issue of serious difficulty. Despite using different metaheuristic optimization methods to selective harmonic elimination (SHE), there are still drawbacks in convergence stability, finding accurate solutions, and the ability of the method to suppress harmonic. The proposed study will have a three-stage, 9-level, and reduced-switch-count T-type multilevel inverter design with pulse width modulation (PWM) and selective harmonic elimination (SHE). The equations of the nonlinear SHE switching angle are optimized with an objective of reducing harmonic distortion within basic voltage limitations over a broad modulation index depth (0.1–1.0). A fairly recent algorithm is the Sea-Horse Optimization (SHO) used to calculate the optimal switching angles of the SHE-PWM setup. The application of SHO is relatively compared with Particle Swarm Optimization (PSO) and Genetic Algorithm (GA). The simulation outcomes show that SHO is better in harmonic suppression and convergence is more stable. At M 1, SHO has a THDe of 0.03%, which is dramatically better than GA (0.19%) and PSO. The findings prove that the balance mechanism of exploration-exploitation and the search strategy of SHO which uses the Levy-flight mechanism promotes the improvement of optimization robustness. The suggested SHO-based SHE-PWM method enhances the quality of power and the number of switches is kept less providing a relevant and effective solution to a high-level multilevel inverter.