科研速览 · Science Skim继续刷下去 · Keep skimming →
◆ Light Science & Applications2026-01-29· Laser linewidth

1-MHz linewidth VCSEL enabled by monolithically integrated passive cavity for high-stability chip-scale atomic clocks

Zhiting Tang, Chuanlin Li, Xuhao Zhang, Wuyang Ren, Kai Shen, Chuang Li, Qingsong Bai, Jin Li, Aobo Ren, Hao Wang, Xiaorong Luo, Hongxing Xu, Jiang Wu

原始摘要(英文原文)· Original abstract
Abstract Narrow-linewidth vertical-cavity surface-emitting lasers (VCSELs) are key enablers for chip-scale atomic clocks and quantum sensors, yet conventional designs suffer from short cavity lengths and excess spontaneous emission, resulting in broad linewidths and degraded frequency stability. Here, we demonstrate a monolithically integrated VCSEL operating at the cesium D 1 line (894.6 nm) that achieves intrinsic linewidth compression to ~1 MHz, without requiring external optical feedback. This performance is enabled by embedding a passive cavity adjacent to the active region, which spatially redistributes the optical field into a low-loss region, extending photon lifetime while suppressing higher-order transverse and longitudinal modes. The resulting device exhibits robust single-mode operation over a wide current and temperature range, with side-mode suppression ratio (SMSR) > 35 dB, orthogonal polarization suppression ratio (OPSR) > 25 dB and a beam divergence of ~7°. Integrated into a Cesium vapor-cell atomic clock, the VCSEL supports a frequency stability of 1.89 × 10 –12 τ -1/2 . These results position this VCSEL architecture as a compact, scalable solution for next-generation quantum-enabled frequency references and sensing platforms.
读原文 · Read the paper ↗

AI 追问PRO

登录后使用 AI 追问

讨论区

登录后参与讨论

相关论文 · Related

1-MHz linewidth VCSEL enabled by monolithically integrated passive cavity for high-stability chip-scale atomic clocks — 科研速览 Science Skim