Simulation of ADRC application in low-level RF system of UTEF

The Ultra-fast Transient Experimental Facility (UTEF), designed for low emittance and high intensity demands enhanced algorithmic stability for RF control. This paper presents a simulation study of an active disturbance rejection controller (ADRC) applied to the 1.5 GHz third-harmonic cavity of the UTEF storage ring. A detailed cavity model incorporating amplifier noise, power-supply ripple, temperature-induced detuning drift and pulsed beam loading up to 50 mA is established in Simulink. The results shows that ADRC significantly suppresses the transient voltage drop and phase shift caused by sudden beam loading and exhibits stronger robustness against large detuning steps. The linear ADRC algorithm, including the extended state observer and state-error feedback, has been implemented in VHDL and successfully verified through simulation on a Xilinx vivado platform. These results demonstrate the superior disturbance rejection capability of ADRC and provide a feasible control scheme and ready-to-use digital implementation reference for the future UTEF low-level RF (LLRF) system.