GS-YOLO: A lightweight and high-performance method for PCB surface defect detection

The compact layout and complex background of printed circuit boards (PCBs) pose significant challenges for surface defect detection. With limited computational resources, ensuring that PCB defect detection models are lightweight while maintaining detection performance is a persistent challenge. To address this, we propose a novel GS-YOLO network based on the YOLOv5s framework, designed to accurately identify PCB surface defects with lower computational cost. In the GS-YOLO model, we introduce the C3Ghost-S module, integrating it into the network’s backbone and neck structures. This not only reduces computational cost but also improves the model’s detection accuracy and generalization ability. Additionally, we propose the GA-SPPF module, which extracts global information and combines it with local information obtained from the SPPF module, helping the model learn both local and global features for a more comprehensive understanding of the image. Notably, the modules we designed are plug-and-play within YOLO architecture series, allowing for easy integration into different YOLO-based frameworks. Compared to YOLOv5s, GS-YOLO improves mAP by 8.1 %, reduces the parameter count by 26.49 %, and lowers computational complexity by 32.27 %. To further validate the model’s generalization capability, we conduct extensive evaluations on both the NEU-DET and GC10-DET datasets. The robustness of GS-YOLO has also been verified under various simulated degradation conditions. Through extensive experiments and comparisons with other advanced models, GS-YOLO shows significant advantages, achieving an outstanding balance between model lightweighting and superior detection performance. Our code is available at: https://github.com/niuniuhhh/GS-YOLO/tree/main .