Jinwoo Park, Hyungjin Kim
Memristor-based hardware security primitives have attracted attention owing to their intrinsic variability and stochastic switching dynamics; however, most prior demonstrations implement physical unclonable functions (PUFs), true random number generators (TRNGs), and cryptographic operations as functionally separated modules. Here, we present a unified hardware security platform in which PUF, TRNG, and in-memory encryption are co-realized within a single memristor crossbar array. Post-fabrication annealing reshapes the high-resistance-state landscape into a stable dual-entropy material state, simultaneously enabling static device-to-device variability for PUF operation and dynamic random telegraph noise for TRNG generation. Leveraging this entropy-engineered landscape, vector-matrix multiplication-based encryption is directly implemented within the array and combined with lookup-table-assisted decryption, allowing encryption to operate as an intrinsic in-memory physical process. The integrated system demonstrates collision-resilient encryption, robust decryption under device variations, high-quality randomness, and reliable privacy-preserving mutual authentication. This work establishes a materials-driven approach to compact, low-power, and intrinsically secure in-memory hardware architectures for next-generation Internet-of-Things applications.